Name of the participant: Lukas Sommer
Description of the IT research project: Achieving a profound understanding of everyday processes and complex interrelationships that are not easily accessible to the human observer is a central goal of current technical developments.
Probabilistic models from the field of machine learning are a powerful tool for understanding these relationships and at the same time offer advantages over current standard ML models.
The so-called Sum Product Networks (SPN) are a very promising candidate from the field of probabilistic models because they combine high precision and efficient computability. However, in order to be able to apply the networks to large amounts of data in practically relevant application scenarios, efficient mapping to today’s heterogeneous computer systems is crucial.
Therefore, the overall goal of this project is to develop a specialized compiler that can map SPNs to different hardware platforms. Thereby the mapping to the following target platforms is aspired:
- Modern CPUs that support several types of parallel processing (vector calculation, multi-thread).
- Graphics cards (GPUs) that offer high performance for massively parallel calculation problems.
- Field-programmable gate arrays (FPGA) that enable the implementation of very efficient, specialized hardware accelerators.
The developed compiler shall enable an automatic mapping of SPNs to the three mentioned platforms, thus making the computing power of modern, heterogeneous systems accessible to ML domain experts.
The entire compile flow is to be evaluated with practical applications from Sum Product Networks, e.g. the automatic detection of fraudulent transactions.
Software Campus partners: TU Darmstadt, Huawei
Implementation period 01.02.2020 – 30.11.2021
